Actually, I do not feel up to the task of writing a tutorial about CPLD development since I’m still just starting to learn myself. For a few first tests let me direct you to dangerousprototypes.com. There you will find simple examples in VHDL, Verilog and schematic entry.
Once you successfully implemented a simple test design you will have to create an xsvf file which will store the design and instructions to write it into the CPLD. To do that, you have to double click on the “Manage Configuration Project” option in the design tab of your project:
This will open the iMPACT program. Here you have to double click on the “Boundary Scan” option
and then right click into the white area to add a Xilinx device.
Choose the *.jed file in your project directory. Now you should have a device shown in the white area:
Right click on it and choose “One Step XSVF”. If everything goes smoothly you should get the message “Expressxsvf Succeeded” and now have a “default.xsvf” in your project directory.
Now we have to put the design into the CPLD.